MUX2x1(3bit wide):-

  MUX 2:1 :-

//s-select line ; Y-output ; I0,I1 -input lines

module mux2x1 (y,s,i0,i1); 
input s,i1,i0;
output y;
assign y=((~s)&(i0))+((s)&(i1));
endmodule

 MUX2x1(3bit wide):-

module mux2x1_3b(Y,s,I0,I1);
input[2:0]I0,I1;
input s;
output [2:0]Y;
mux2x1 m1 (Y[0],s,I0[0],I1[0]); 
mux2x1 m2 (Y[1],s,I0[1],I1[1]); 
mux2x1 m3 (Y[2],s,I0[2],I1[2]);
endmodule 

 MUX 4:1 Testbench:-

module mux2x1_3b_tb();
reg s;
reg [2:0] I1,I0;
wire [2:0] Y;
mux2x1_3b dut (Y,s,I0,I1);
initial
begin
repeat(20)
begin
{s,I0,I1}=$random;
#2
$display(s,I0,I1,":",Y);
end
end
endmodule