VERILOG CODES :-

 VERILOG CODES :- (by NUTAN.K)

COMBINATIONAL :- 

1.MUX:- (one bit wide)

 1a) 2:1 MUX and its Testbench 

 1b) 4:1 MUX using 2:1 and its testbench

2.MUX:- (input bit wide)

 2a) 2:1 MUX (3bit wide) and its Testbench 

3.ADDERS :-

3a) Half adder and its testbench

3b) Full adder and its testbench

3c)  X-Full adder and its test bench

3d) XL-Full adder and its test bench

3e) 6i/p adder (1bit wide) and its testbench

3f) 7i/p adder (1bit wide) and its testbench

3g) 8i/p adder (1bit wide) and its testbench

3h) 9i/p adder (1bit wide) and its testbench

3i) 10i/p adder (1 bit wide) and its testbench

3j) 11 i/p adder (1bit wide) and its testbench

3k) 2 i/p adder (5bit wide) and its testbench

3l) 2 i/p adder (1bit,5bit wide) and its testbench

4.SUBTRACTORS :-

4a) 2 i/p subtractor (5bitwide) and its testbench

5.COMPARATORS :-

5a) Two i/p comparator (one bit wide)

5b) Two i/p comparator (two bit wide)

5c) Two i/p comparator (four bit wide)