Friday, December 30, 2022

 HALF ADDER:- 

module ha(c,s,a,b);
input a,b;
output s,c;
xor x1(s,a,b);
and a1 (c,a,b);
endmodule

Testbench:- 

module hatb ();
reg a,b;
wire c,s;
ha dut (c,s,a,b);
integer i;
initial
begin
for (i=0;i<=3;i=i+1)
begin
{a,b}= i;
#1;
$display(a,b,":",c,s);
end
end
endmodule

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