Saturday, December 31, 2022

 6 i/p - 1bit wide ADDER:-

module add6 (cout2,cout1,s,a,b,c,d,e,f);
input a,b,c,d,e,f;
output cout2,cout1,s;
xlfa xl1 (c2,c1,s1,a,b,c,d,e);
ha h1 (c3,s,s1,f);
ha h2 (c4,cout1,c3,c1);
ha h3 (c5,cout2,c4,c2);
endmodule

 Test Bench:-

module adtb ();
reg a,b,c,d,e,f;
wire cout2,cout1,s;
add6 dut (cout2,cout1,s,a,b,c,d,e,f);
integer j;
initial
begin
for (j=0;j<=63;j=j+1)
begin
{a,b,c,d,e,f}= j;
#1;
$display(a,b,c,d,e,f,":",cout2,cout1,s);
end
end
endmodule



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